# Encoder

An encoder is used to convert from N inputs to an B-bit binary code where B=ceil(log2N). Here "ceil" is the ceiling function which returns the smallest integer greater than or equal to its argument. The encoder is a common example of a combinational logic circuit.

## Example

The following truth table shows an octal to binary encoder. The variables `X0` to `X7` are the eight input variables and `A2`, `A1`, and `A0` form the 3-bit output binary code — ceil(log28)=3. As can be seen, only one input variable has the value `1` and all others are `0`. This isn't always the case as some encoders employ a priority scheme, e.g. if `X5` and `X3` were `1` then `X3` would be ignored. This would be an example of a priority encoder. Note that some encoders have inputs that are the dual of this example, i.e. only one input variable has the value `0` and all others are `1`.

`X0` `X1` `X2` `X3` `X4` `X5` `X6` `X7` `A2` `A1` `A0`
`1``0``0``0` `0``0``0``0` `0``0``0`
`0``1``0``0` `0``0``0``0` `0``0``1`
`0``0``1``0` `0``0``0``0` `0``1``0`
`0``0``0``1` `0``0``0``0` `0``1``1`
`0``0``0``0` `1``0``0``0` `1``0``0`
`0``0``0``0` `0``1``0``0` `1``0``1`
`0``0``0``0` `0``0``1``0` `1``1``0`
`0``0``0``0` `0``0``0``1` `1``1``1`

## Verilog

Below is the Verilog code for a structural model of an octal to binary encoder:

``` module octal_encoder(A2, A1, A0, X0, X1, X2, X3, X4, X5, X6, X7); output A2; // Output binary code most significant bit output A1; // Output binary code middle bit output A0; // Output binary code least significant bit input X0; // Encoded to 000 input X1; // Encoded to 001 input X2; // Encoded to 010 input X3; // Encoded to 011 input X4; // Encoded to 100 input X5; // Encoded to 101 input X6; // Encoded to 110 input X7; // Encoded to 111 or(A0, X1, X3, X5, X7); or(A1, X2, X3, X6, X7); or(A2, X4, X5, X6, X7); endmodule ```

A simulation with test inputs gave the following wave form:

## References

Kleitz, W. Digital Microprocessor Fundamentals. 3rd Edition. Prentice Hall, 2000.
Mano, M. Morris, and Kime, Charles R. Logic and Computer Design Fundamentals. 2nd Edition. Prentice Hall, 2000.