A full adder is an arithmetic circuit which adds three bits: A
, B
and Cin
.
The circuit outputs are the sum S
and carry Cout
.
The difference between a half adder and a full adder is that the half adder does not
have the Cin
input bit.
A full adder can be used as the basic building block for adding two N-bit numbers giving a (N+1)-bit result.
Such a circuit would contain N full adders.
If we number the bits of our numbers starting at 0 for the least significant bit, then the Cout
of
bit k becomes the Cin
of bit k+1.
The adder for bit number 0 can either be a half adder, or, a full adder with Cin
tied to 0.
Such a configuration is called a ripple carry adder.
The following truth table gives the specification:
A | B | Cin | S | Cout |
---|---|---|---|---|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | 1 |
The simplified equations for the full adder are:
S = A xor B xor Cin
C = (A and B) or (A and Cin) or (B and Cin)
In schematic form this is:
Below is a Verilog structural model for the full adder.
In the code, the first argument to xor
, and
, and or
is the gate output, the other arguments are
gate inputs.
module full_adder(S, Cout, A, B, Cin);
output S;
output Cout;
input A;
input B;
input Cin;
wire w1;
wire w2;
wire w3;
wire w4;
xor(w1, A, B);
xor(S, Cin, w1);
and(w2, A, B);
and(w3, A, Cin);
and(w4, B, Cin);
or(Cout, w2, w3, w4);
endmodule
Mano, M. Morris, and Kime, Charles R. Logic and Computer Design Fundamentals. 2nd Edition. Prentice Hall, 2000.
Kleitz, W. Digital Microprocessor Fundamentals. 3rd Edition. Prentice Hall, 2000.
Copyright © 2014 Barry Watson. All rights reserved.