# Multiplexer

An N-line multiplexer, a.k.a. an N-to-1 multiplexer, is used to assign a single output line to one of N input lines. The input line which is used depends on a B-bit selection input where B=ceil(log2N). Here "ceil" is the ceiling function which returns the smallest integer greater than or equal to its argument. The multiplexer is a common example of a combinational logic circuit.

## Example

The following variant of a truth table shows a 4-line multiplexer without the input lines. The variables `S0` and `S1` form the 2-bit selection input and the variable `X` is the output variable. The column entries for `X` contain either `A1`, `A2`, or `A3`, and these are the line inputs to the multiplexer. The names are given in the output column to save space because the input line values aren't important. For example, we only need to know that if both `S0` and `S1` are equal to `0` then `X` has the same value as the `A0` input line, we don't need to know what the value of `A0` is.

`S0` `S1` `X`
`0``0``A0`
`0``1``A1`
`1``0``A2`
`1``1``A3`

## Verilog

Below is the Verilog code for a dataflow model of an 4-line multiplexer:

``` module multiplexer_4_1(X, A0, A1, A2, A3, S1, S0); parameter WIDTH=16; // How many bits wide are the lines output [WIDTH-1:0] X; // The output line input [WIDTH-1:0] A3; // Input line with id 2'b11 input [WIDTH-1:0] A2; // Input line with id 2'b10 input [WIDTH-1:0] A1; // Input line with id 2'b01 input [WIDTH-1:0] A0; // Input line with id 2'b00 input S0; // Least significant selection bit input S1; // Most significant selection bit assign X = (S1 == 0 ? (S0 == 0 ? A0 // {S1,S0} = 2'b00 : A1) // {S1,S0} = 2'b01 : (S0 == 0 ? A2 // {S1,S0} = 2'b10 : A3)); // {S1,S0} = 2'b11 endmodule // multiplexer_4_1 ```

A simulation with 8-bit wide lines gave the following wave form:

## References

Kleitz, W. Digital Microprocessor Fundamentals. 3rd Edition. Prentice Hall, 2000.
Mano, M. Morris, and Kime, Charles R. Logic and Computer Design Fundamentals. 2nd Edition. Prentice Hall, 2000.